PIC16CR76T-I/SS【PDF 12/172 页】IC PIC MCU 8KX14 28SSOP

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2007 Microchip Technology Inc.

DS39599G-page 107

PIC18F2220/2320/4220/4320

10.3

PORTC, TRISC and LATC

Registers

PORTC is an 8-bit wide, bidirectional port. The corre-

sponding Data Direction register is TRISC. Setting a

TRISC bit (= 1) will make the corresponding PORTC

pin an input (i.e., put the corresponding output driver in

a high-impedance mode). Clearing a TRISC bit (= 0)

will make the corresponding PORTC pin an output (i.e.,

put the contents of the output latch on the selected pin).

The Data Latch register (LATC) is also memory

mapped. Read-modify-write operations on the LATC

PORTC.

PORTC is multiplexed with several peripheral functions

(Table 10-5). The pins have Schmitt Trigger input buff-

ers. RC1 is normally configured by Configuration bit,

CCP2MX (CONFIG3H<0>), as the default peripheral

pin of the CCP2 module (default/erased state,

CCP2MX = 1).

When enabling peripheral functions, care should be

taken in defining TRIS bits for each PORTC pin. Some

peripherals override the TRIS bit to make a pin an output,

while other peripherals override the TRIS bit to make a

pin an input. The user should refer to the corresponding

peripheral section for the correct TRIS bit settings.

The contents of the TRISC register are affected by

peripheral overrides. Reading TRISC always returns

the current contents even though a peripheral device

may be overriding one or more of the pins.

EXAMPLE 10-3:

INITIALIZING PORTC

FIGURE 10-10:

PORTC BLOCK DIAGRAM (PERIPHERAL OUTPUT OVERRIDE)

Note:

On a Power-on Reset, these pins are

configured as digital inputs.

CLRF

PORTC

; Initialize PORTC by

; clearing output

; data latches

CLRF

LATC

; Alternate method

; to clear output

; data latches

MOVLW

0xCF

; Value used to

; initialize data

; direction

MOVWF

TRISC

; Set RC<3:0> as inputs

; RC<5:4> as outputs

; RC<7:6> as inputs

Data Bus

WR LATC or

WR TRISC

RD TRISC

Peripheral Data Out

RD PORTC

Peripheral Data In

WR PORTC

RD LATC

Peripheral Output

Schmitt

Port/Peripheral Select(2)

Enable(3)

VSS

VDD

I/O pin(1)

Note 1:

I/O pins have diode protection to VDD and VSS.

Port/Peripheral Select signal selects between port data (output) and peripheral output.

Peripheral Output Enable is only active if Peripheral Select is active.

Data Latch

TRIS Latch

Trigger

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